代写辅导接单-EGEC 540 Computer Arithmetic Structures Fall 2023 Exercise 3

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10/23/23, 1:58 PM Exercise 3

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Due Nov 7 by 11:45pm Points

Exercise 3

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 California State University, Fullerton

Department of Electrical and Computer Engineering EGEC 540 Computer Arithmetic Structures Fall 2023 Exercise 3

Team exercise; must work in a team of two

Make only one submission per team

   The goals of this exercise are as follows:

Simulation of the functionality and delay of a 32-bit ripple carry adder (RCA) using C/C++ Estimation of RCA delay for a specific pair of inputs, A and B

Estimation of the average RCA delay

Follow the instructions in Part 1 and Part 2 below to complete this team exercise.

Part 1

1. Convert each of two unsigned integer input numbers, A and B, into binary and store them in two 32- bit wide arrays. Name the arrays “a” and “b”, respectively.

2. Simulate the functionality and delay of the RCA. Store the sum in a 32-bit array called “s”. Name the last carry-out as Lcout. Initialize the RCA delay as D=0, where D is one logic-level gate delay (ignore NOT gate delays). You must include meaningful comments in your program to explain your code.

3. As the RCA addition process progresses, the value of the variable D should be updated in the program accordingly. Upon completion of the entire process, the following must be displayed (with proper formatting):

Input vales of A and B in decimal format.

Input values in binary format

Result of addition in binary format

Result of addition in decimal format

Final delay at the conclusion of the addition process

  https://csufullerton.instructure.com/courses/3410015/assignments/35823244 1/3

 

10/23/23, 1:58 PM Exercise 3 4. Verify the RCA operation and delay.

5. Keep all your part 1 work and move on to part 2.

Part 2

Generate a pair of pseudorandom unsigned int numbers using the srand and rand functions Convert each pair to 32-bit unsigned binary format

Apply this pair of inputs to the RCA you simulated in steps 2 and 3. Store the final delay value as the first value of an array called “D_array”.

2. Repeat step 1 for 9,999 more pairs of inputs (total 10,000 cases). Store the final delay for each pair in the “D_array”.

3. Find the average delay (Variable name: “Avg_Delay”; type: float) for the 10,000 pairs by adding all the elements of the D_array and dividing the sum by 10,000.

4. Display

Submission details

Submit the following (make only one submission per team with the names of both contributing team members):

A main report (see additional details below) Code for part 1

Code for part 2

The main report shall be a single document consisting of all of the following.

  1.

2. 3.

(i) 1 1 0 0 (ii) 1 1 0 0 (iii)

1 1

https://csufullerton.instructure.com/courses/3410015/assignments/35823244 2/3

A brief explanation section report (up to 2 pages; single-spaced, font-size 12 Times New Roman) that clearly explains your approach. Also discuss your results here and state your conclusions.

Appendix A to the report showing your C/C++ code for part 1.

Appendix B to the report showing the results of the RCA addition and delay for the three 32-bit input pairs given below. Also include both uncropped (showing date and time) as well as cropped (and clear) screenshots of the RCA addition result and final delay:

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 11 1 11 1 11 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 00 0 00 0 00 0

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 11 1 11 1 11 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 00 0 00 0 00 1

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 11 1 11 1 11 1

 

10/23/23, 1:58 PM Exercise 3 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 11 1 11 1 11 1

4. Appendix C to the report showing your C/C++ code for part 2.

5. Appendix D to the report showing Avg_Delay from part 2. Also include Also include an uncropped

(showing date and time) and a cropped (and clear) screenshot of this.

https://csufullerton.instructure.com/courses/3410015/assignments/35823244 3/3

 

 


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