A Collection of Previous Examination Questions
Note: Many of these questions were based on a PIC 16 processor and current
material covers the PIC 18.

Question: A digital oscilloscope is connected to a data line of an RS232 interface. The
following waveform is recorded:
A
208 us
-12V
Time
Voltage
+12V
B C

Figure Recorded asynchronous serial interface waveform.
a) What is the bit referenced by ‘A’ commonly called ? [1 Mark]
b) Does the bit referenced by ‘B’ tend towards the MSB or the LSB portion of the transmitted
word? [1 Mark]
c) What is the region referenced by ‘C’ commonly called ? [1 Mark]
d) What state does the interface idle in when no characters are being transmitted ? [1 Mark]
e) Why are bipolar signals (±12V) used ? [1 Mark]
f) What is the baud rate of this transmission ? [1 Mark]
g) List all the CCS C compiler directives that could have been responsible for generating
this signal {#use RS232(..…)}. Document your reasoning. [1 Mark]
h) What (keyboard/ASCII) character has been transmitted ? [1 Mark]
i) Two PIC microprocessors communicate with one another using an asynchronous serial
interface. Both processors are set to use their internal resistor-capacitor (#fuses INTRC)
oscillator. The oscillator of the transmitting PIC runs at 4.0 MHz whilst the oscillator of the
receiving PIC runs at 3.501 MHz. What (keyboard/ASCII) character will be decoded by the
receiver ? [2 Marks]
A laboratory experiment is conducted to interface an LCD module to a PIC microprocessor
using an 8-bit interface, as shown in Figure below.
PIC16F648
RS
E
D0..D7
A.0
LCD Module
Port B
A.2
A.1 RW

Figure: LCD module interface connections
j) Discuss the functions of the RS, R/W and E control lines. [2 Marks]
k) The functionality of LCD module is to be ‘included’ within the main program using a
software driver module. To aid software portability the IO pin definitions are to be applied
using a suitable memory-mapped data structure. Show the C code fragment required to
define the data structure, instantiate occurrences, map occurrences to IO port memory
locations and initialise the direction of the IO pins. [4 Marks]
l) The timing diagram for a write operation to the display area is shown in Figure below.
The write operation is to be bundled into a procedure with prototype
void write_data_byte(char data). Show the C code fragment required to implement the
timing diagram shown in Figure below. [4 Marks]
Data ValidD0..D7
RS
R/W
E
1 us
1 us

Figure: Timing diagram for write operation to LCD module
Free Format Modular Design Question (This approach is not currently used)
A laboratory measurement machine uses two lead screws (X and Y) driven by stepper
motors. The table can traverse 500 mm in each direction and 40 motor steps are required
per millimetre. The table is to be controlled by an interrupt driven PIC microprocessor
connected to a PC via an RS232 interface. Following the application of power, the operator
may reset the table by traversing both axes until they activate their respective limit switches
– this position is defined as X=0 and Y=0.
The commands that may be sent from the PC are:
i) ‘RE’ – reset the table in both axes unit the limit switches are activated and zero the
position registers.
ii) ‘XD 123.4’ – demanded position for the X axis. The fixed format value represents the
position in millimetres and may range from 000.0 to 500.0 mm.
iii) ‘YD 001.5’ – demanded position for the Y axis. The fixed format value represents the
position in millimetres and may range from 000.0 to 500.0 mm.
Show the design stages required to implement this system based on an interrupt-driven PIC
microprocessor. You should include circuit diagrams, code fragments and adequate textual
description. [20 Marks]

ASCII Code Chart
0 1 2 3 4 5 6 7 8 9 A B C D E F
0
NU
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X
ET
X
EO
T
EN
Q
AC
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BE
L
BS HT LF VT FF CR
S
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1
DL
E
DC
1
DC
2
DC
3
DC
4
NA
K
SY
N
ET
B
CA
N
EM
SU
B
ES
C
FS GS
R
S
US
2 SP ! " # $ % & ' ( ) * + , - . /
3 0 1 2 3 4 5 6 7 8 9 : ; < = > ?
4 @ A B C D E F G H I J K L M N O
5 P Q R S T U V W X Y Z [ \ ] ^ _
6 ` a b c d e f g h i j k l m n o
7 p q r s t u v w x y z { | } ~
DE
L


Question
a) Why is the code written to interface to peripherals such as a liquid crystal display usually
implemented as a ‘driver’ subroutine, stored within a separate source file and ‘# included’
within the main program? [5 marks]
b) Why does a peripheral driver routine often use memory-mapped data structures to
address the IO pins of a processor? Illustrate your discussion with suitable code fragments.
[5 marks]
c) A 7-segment light emitting diode display is to be connected to the least significant bits of
Port A of a PIC microprocessor. The order of the segments is shown in Figure below. A
suitable driver is to be written of prototype ‘void LED (int8)’ that takes a number in the range
0..9 and displays the correct segments. Show the code of a suitable driver using a memory-
mapped IO data structure and a look-up conversion table. [6 marks]
a
g
f
e
d
c
b

Figure: 7-segment LED
d) Show a suitable main program that will repeatedly count through the sequence of digits
0..9. The period between increments should be 100 ms if the most significant bit of Port A is
high and 200 ms if it is low. Only one memory-mapped IO data structure may be used within
the main and driver subroutine source files. [4 marks]
Free Format Modular Design Question (This approach is not currently used)
Two stepper motors are to be used to drive a line-following robot within an undergraduate
group design project. Two conflicting approaches arise from different factions within the
group. These are summarised as:
Faction i) Use a total of three microprocessors; one to act as the central ‘brain’ and one
controlling each of the wheels. The advocates argue that software time delays may be used
and no interrupt routines are necessary.
Faction ii) Use a single microprocessor and implement the independent control of the motor
speeds by using interrupts. The advocates argue that that the total system will be simpler as
no inter-processor communication system is required.
Compare and contrast the two approaches including system block diagrams and code
fragments to illustrate your discussion.
Marks will be awarded for a technically sound design approach with the following mark
scheme.
High-level block diagrams and reasoned discussion: 5 Marks
Inter-processor communication implementation: 5 Marks
Interrupt implementation to drive two motors: 5 Marks
Memory-mapped IO structures, remaining code fragments and summary: 5 Marks

Question
(a) Compare and contrast a compiler directive (e.g. #fuses INTRC), a
variable declaration (e.g. int i) and an assignment (e.g. i = i++).
[3]
(b) Briefly discuss the need for multiple oscillator configurations on a
modern embedded processor and the applicability of the following fuse
configurations; #fuses INTRC, #fuses LP, #fuses XT and
#fuses HS. [4]
(c) A set of LED tree lights is to be designed, using seven strings of light
emitting diodes connected to the most-significant bits of an 8-bit port. A
mode selection switch is connected to the least-significant bit of the
port. When the switch is activated, the LEDs are illuminated in a
‘running-light sequence’ (one-after-another to give the appearance of a
light source moving along the strings). When the switch is inactivated,
all the lights should be off. Show the C code fragment required to
implement the embedded controller software for the tree lights using a
memory-mapped structure, a look-up table and a software time
delay. [7]
(d) A second group of eight light emitting diodes strings is to be added to
implement a public street-decoration display. These LED strings are
connected to an I/O port with an adjacent address to that used in part
(c). Two LED strings are to be active simultaneously in this group and
are to move round at a different rate to the single illuminated LED string
implemented previously. Show the C code fragment required to
implement the embedded controller software for the public street-
decoration display using a memory-mapped structure, two look-up
tables, an internal hardware timer (Timer 0) and an interrupt routine. [6]

Free Format Modular Design Question (This approach is not currently used)
An embedded system is to be designed to measure the temperature from
sixteen separate platinum resistance thermometers and to log the data to
memory. Some time later, a front-panel button may be pressed and the data
will be downloaded to an RS232 interface.
Two ADS7830 I2C, 8-bit, analogue-to-digital converters, each containing eight
multiplexed inputs, are connected to the platinum resistance thermometers.
Two hardware address selection pins (A1, A0) are available on the A/D
converters (to allow up to four devices to be connected) and the I2C selection
word is as follows:

1 0 0 1 0 A1 A0 R/W

The eight inputs to the ADS7830 device are multiplexed to a single A/D
converter and the selection is made by writing three selection bits (C2, C1, C0)
with a number in the range 0..7.

1 C2 C1 C0 1 1 0 0

Thereafter, the data from the A/D conversion unit may be recovered by reading
a byte from the I2C interface.
A single M24256, 256k-bit EPROM is to be used for data storage purposes.
Three hardware address selection pins (A2, A1, A0) are available on the
memory device (to allow up to eight devices to be connected) and the I2C
selection word is as follows:

1 0 1 1 A2 A1 A0 R/W

An access to the memory is most easily obtained by writing two bytes of
address information followed by either a write, or a read, operation.
The designer is to assign an appropriate interrupt-driven sampling rate such
that the outputs from the sixteen 8-bit analogue-to-digital converters can be
stored for a period of one week without data loss.
Show the design stages required to implement this system based on an
interrupt-driven PIC microprocessor. You should include circuit diagrams, code
fragments and adequate textual description. [20]

Question
A stepper motor is to be connected to Port B0..3 of a PIC 16F648
microcontroller. A switch connected to Port A0 should initiate two revolutions
of a 1.8° step motor. Four speeds should be selectable using two-bits
associated with Port A1..2.
(a) The following student-written code compiles, but does not function as
expected. List your top-five prioritized actions for ensuring the code
works and improving the through-life maintainability. Warning: spend
less than two minutes per action. [10]
#include <16F648A.h>
#FUSES NOWDT,INTRC,NOPUT,NOPROTECT,BROWNOUT,NOMCLR,NOLVP,NOCPD
#use delay(clock=4000000)

void main()
{
int steps;
while (1)
{
if (input(PIN_A0))
{ /* Student desires motor to rotate when Port A.0 is activated*/
for (steps=0;steps<400;steps++)
{ /* Student desires motor to rotate two revolutions */
if ((steps%4)==0)
{
output_low(PIN_B0);
output_low(PIN_B1);
output_high(PIN_B2);
output_high(PIN_B3);
}
else if ((steps%4)==1)
{
output_high(PIN_B0);
output_low(PIN_B1);
output_low(PIN_B2);
output_high(PIN_B3);
}
else if ((steps%4)==2)
{
output_high(PIN_B0);
output_low(PIN_B1);
output_high(PIN_B2);
output_low(PIN_B3);
}
else if ((steps%4)==3)
{
output_low(PIN_B0);
output_high(PIN_B1);
output_high(PIN_B2);
output_low(PIN_B3);
}
/* Student desires speed control via PortA2..3 */
if (!input(PIN_A1)&&!input(PIN_A2))
delay_ms(5);
else if (input(PIN_A1)&&!input(PIN_A2))
delay_ms(10);
else if (!input(PIN_A1)&&input(PIN_A2))
delay_ms(15);
else if (input(PIN_A1)&&input(PIN_A2))
delay_ms(15);
}
}
}
}

(b) With the aid of suitable block diagrams, show how a for-next loop and
look-up table is equivalent to a Moore model synchronous finite state
machine including output logic. Hence, discuss why look-up tables are
a reliable method of processing multiple input variables within a
microcontroller environment. [3]
(c) Provide suitable code to meet the desired stepper motor controller
specification using look-up tables for the output drive signals and speed
control. Interface signals should be provided by memory-mapped
variable structures. [5]
(d) The annual second year coding challenge claims that this specification
may be met with eight lines of active code within the ‘main’ program,
this includes port initialization and variable declarations, but not
parenthesis (‘{‘ and ’}’) or comments. One ‘while’ loop and one ‘for’
loop’ is permissible, but ‘case’ and ‘if’ constructs should be avoided.
Show the typical approaches for replacing ‘if’ or ‘case’ statements by
memory-mapped input variables in such a challenge. [2]

Free Format Modular Design Question (This approach is not currently used)
A hardware pulse-width timer is to be clocked at 10 MHz. The function of the
device is to measure the ‘on’ pulse duration of an input signal to a resolution of
0.1 s. The output of the timer is to be communicated to a PIC microcontroller
via a suitable parallel interface. The pulse-width value should then be
communicated to a PC in a textual format via an RS232 interface. A block
diagram of the proposed system is shown in Figure below.

RS232 Interface
Components
RS232 Interface
TX
RX
PIC16F648A
Microcontroller
Synchronous Finite
State Machine
10 MHz Clock
Parallel
Interface
Input Signal

Figure: Pulse duration timing system
Show the steps required to implement this system. You should include circuit
diagrams, an appropriate parallel interface protocol, finite state machine
transition equations (suitable for implementation on an FPGA programmable
logic device) and the C code required by the PIC.
The design will be assessed using the following categories:
High-level functional design aspects and resultant specifications. [5]
Circuit diagram and parallel interface protocol. [5]
PIC C Code. [5]
Finite state machine design equations. [5]


Question
a) A software driver is to be written to support an interface device (such as
an LCD module) for use in an embedded system. By use of suitable
block diagrams and appropriate code fragments, show the distribution
of code statements between the ‘main code’ and the ‘driver’. The
design requirement is such that the driver should never need to be re-
compiled when used in a new application. Your discussion should
include, but not be constrained by: device definition, speed definition,
hardware fuses, memory-mapped IO port structure, initial IO port
directions and the use of a bi-directional data bus. [7]
b) An 8-bit synchronous, three-line, serial communications receiver is to
be implemented in software on a PIC microcontroller. This timing
diagram is shown in Figure below.

Frame Synch
E
Data D0 D1 D2 D6 D7

Figure: Timing diagram of a synchronous, three-line, serial communications link
A ‘Frame Synch’ signal signifies the arrival of the first bit of the data
word. Timing validity is signalled by the falling edge of an enable signal
‘E’.
Show the C code routine ‘get_byte’ required to extract a single valid
byte from this input signal. The supporting memory-mapped IO port
structure, initialisation and other applicable ‘main’ code statements
should be included. [7]
c) By means of a software bit-mask (using the bitwise AND function),
provide a routine to count the number of zeros and the number of ones
in the byte returned by the routine ‘get_byte’. [6]

Question
A PIC microcontroller is to be used to drive three (A, B and C) stepper motors
at different non-harmonically related rates, as illustrated by the event-markers
shown in the Figure below.

Figure: Three stepper motors driven at different rates

a) Using a series of bullet points and C code fragments, concisely identify
the reasons why a controller driving a single motor might use a
software time delay whilst the driving of multiple motors at different
rates might prove more difficult. [3]
b) With the aid of the following C code fragments, explain how a hardware
counter-timer may be used as an interrupt source, the actions taking
place within the processor and the high-level language constructs
required implement an interrupt-driven machine. [6]
while (Forever)
void Stepper_Interrupt_Service(void)
#int_RTCC
enable_interrupts(GLOBAL);
void main(void)
enable_interrupts(INT_RTCC);
setup_timer_0(RTCC_INTERNAL|RTCC_DIV_256);
c) With the aid of the appropriate C code fragments, explain how and why
a programmer might use a memory-mapped structure to interface the
three stepper motors to a PIC processor. [4]
d) Show the complete C-code program required to drive three stepper
motors at independent rates. The timing resolution of the controller
should be of the order of 1 ms and the interval between steps should
be variable over the range 5 – 10,000 ms. [7]


Question
(a) Compare and contrast a compiler directive (e.g. #fuses INTRC), a
variable declaration (e.g. int i,j) and an assignment
(e.g. i = j++). [3]

(b) Briefly discuss the need for hardware fuse configurations on a modern
embedded processor and the applicability of the following fuse
configurations; #fuses INTRC, #fuses INTRC_IO, #fuses PUT
and #fuses WDT. [4]

A PIC microcontroller is to be used to communicate with a Hitachi HD48770
LCD display controller. The write cycle timing diagram is illustrated in the
Figure below.

Figure: Write Operation Timing of Hitachi HD48770

The timings listed by Hitachi are:

Item Symbol Time (ns)
Enable cycle time tcycE >500
Enable pulse width (high level) PWEH >230
Address setup time tAS >40
Address hold time tAH >10
Data setup time tDSW >80
Data hold time tH >10

(c) With the aid of the appropriate C code fragments, explain how and why
a programmer might use a memory-mapped structure to interface the
LCD display controller to a PIC processor. Include any initialization
stages that may appear within main{}. [5]
(d) Show the C-code program function required to perform a write
operation to the LCD display controller – link each line of code to a
simplified version of the timing diagram and associated parameters. [8]


Question
(a) Early microprocessors were developed as logic-element replacement
units. For each of the following C statements clearly identify the
corresponding digital element and provide a typical usage example.

(i) int16 i;
i++; [2]

(ii) int8 A,B,C;
C = A | B; [2]

(iii) int8 A;
A = A | 0x80; [2]

(iv) int8 A;
A = A & 0x7F; [2]

(iii) int8 A,i;
int8 LookUpTable[4] = {0x01, 0x05, 0x04, 0x00};
A = LookUpTable [(++i) % 0x03]; [3]

(b) A 7-segment light emitting diode display is to be connected to the least
significant bits of Port B of a PIC microprocessor. The order of the
segments is shown in the Figure below. A suitable driver is to be
written of prototype ‘void LED (int8)’ that takes a number in the
range 0..9 and displays the correct segments. Show the code of a
suitable driver using a memory-mapped Input/Output data structure and
a look-up conversion table. [5]

a
g
f
e
d
c
b

Figure: Segment order of 7-segment light emitting diode display

(c) Show the C code fragment required to implement an RS232 Data
Terminal Equipment receive interrupt routine that detects valid
characters in the range 0..9 and passes them to the ‘void LED
(int8)’ routine. [4]

Question
(a) A wound electrical component, such as a motor or solenoid, is to be
controlled by a microprocessor. The magnetic field must be able to be
reversed as well as controlled in amplitude. Discuss:
 The current sourcing and sinking capabilities of the
microprocessor, the typical requirements of the wound component
and the additional circuitry required to fulfil the desired need.
 The reduction of back-EMF damage to the system.
 The need for localised regenerative energy storage in an
application such as your robot (when supplied using a long
umbilical cable).
 The ability of a microcontroller to vary the amplitude of the current
within the wound device. [8]

You are required to control eight relays from a microcontroller and have
selected a TPL9202 driver as illustrated in the Figure below.

Figure: TPL9202 relay driver (reproduced from www.ti.com)

This device uses a two wire serial interface to transmit eight bits corresponding
to the state of the eight relay drivers. Relay 8 is transmitted first, corresponding
to a big-endian format. The data line is called Master-Out, Slave-In (MOSI).
The strobe, or system clock (SCLK), indicates that the data is stable on the
rising edge and is changed on the falling edge. A chip select signal (NCS) is
low during transmission to act as an extended frame synch signal. The data
transfer timing diagram is illustrated in the Figure below.

SCLK 1 8765432
MOSI
IN8 IN7 IN6 IN5 IN4 IN3 IN2 IN1X
NCS
T1
T2
T3
T4 T5
T6 T7
Figure: Interface timing diagram of TPL9202 (reproduced from www.ti.com)

The corresponding minimum timing specifications are as follows:
T1 Delay time, NCS falling edge to SCLK rising edge 10 ns
T2 Delay time, NCS falling edge to SCLK falling edge 80 ns
T3 Pulse duration, SCLK high 60 ns
T4 Pulse duration, SCLK low 60 ns
T5 Delay time, last SCLK falling edge to NCS rising edge 80 ns
T6 Setup time, MOSI valid before SCLK edge 10 ns
T7 Hold time, MOSI valid after SCLK edge 10 ns

(b) A software driver is to be written to support the TPL9202 device for use in an
embedded system. By use of suitable block diagrams, show the distribution
of code functionality between the ‘main code’ and the ‘driver’. The design
requirement is such that the driver should never need to be re-compiled when
used in a new application. Your discussion should include, but not be
constrained by: device definition, speed definition, hardware fuses, memory-
mapped IO port structure, initial IO port directions and interface control lines
(but not actual code). [3]

(c) With the aid of the appropriate C code fragments, explain how and why
a programmer might use a memory-mapped structure to interface the
TPL9202 to a PIC processor. Include any initialization stages that may
appear within main{}. [4]

(d) Show the C-code program driver function required to perform a bit-
banging write operation to the TPL9202 device – link each line of code
to a simplified version of the timing diagram and associated
parameters. [5]

Question
(a) Unfortunately, many good finite state machine designers who have been
trained to develop formally correct approaches write poor software code.
Using the following example, discuss why ‘previously learnt’ lessons are
forgotten and propose improved code fragments. [4]
if (X)
{ // Functional code }
elseif (Y)
{ // Functional code }
elseif (Z)
{ // Functional code }

(b) Briefly discuss typical uses of the bitwise-AND (&) and bitwise-OR (|)
operations within an embedded system. Use appropriate code fragments
to illustrate your answer. [4]

(c) The following code fragment is found within an embedded processor:
while(1)
{
Counter = (++Counter) % 128;
IO_Port.MainLEDs = Counter;
delay_ms(500);
)
Discuss the operation of this code fragment and state the key parameters
of the synchronous finite state machine that it emulates. [4]

(d) The following code fragment is found within an embedded processor:
int LUT[8]={0x00,0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x8};
int SpeedLookUpTable[4] = {0x1F,0x3F,0x7F,0xFF};

while(1)
{
Index = (++Index) % 8;
IO_Port.MainLEDs = LUT[Index];
delay_ms(SpeedLookUpTable[IO_Port.Sw]);
)
Discuss the operation of this code fragment and state why the techniques
used might lead to more operationally reliable code. [4]

(e) Write a complete C code program to run on a PIC that takes 8-inputs
from Port A, transforms the data and outputs it to Port B. The transform is
controlled by bits A6 and A7 as follows:
 If A6=0 and A7=0 then output an 8-bit up-counter with a period set
by A0:A5 in milliseconds.
 If A6=1 and A7=0 then output an 8-bit down-counter with a period
set by A0:A5 in milliseconds.
 If A6=0 and A7=1 then output a binary number that is incremented
by an amount set by A0:A3 at a rate set by A4:A5 in seconds.
 If A6=1 and A7=1 then output the Exclusive-OR of A0:A6 with A1:A7,
also set B7=1. [4]

Question
(a) A 12-bit digital-to-analogue converter is to be interfaced to a microcontroller and
used to generate a 2 kHz signal for a line-following vehicle project. Discuss why a
hardware timing signal is required to define the sampling instants, rather than
software, and derive an appropriate maximum value for the timing uncertainty that
may be tolerated in this application.



[3]

(b) The Timer 2 module of an 18F27K40 is to be used to generate an active-low latch
signal (LDAC) and an interrupt for a digital-to-analogue converter sampling at a
rate of 32 kHz. Timer 2 is to be driven from a master clock frequency of 64 MHz.
Describe the features of Timer 2 relevant to this application and derive the CCS C
compiler statements required by the Timer 2 module.

Figure: Timer 2 block diagram




[4]

(c) Timer 2 is to be paired with the PWM 4 module of an 18F27K40 to generate the
LDAC signal and driven from a master clock frequency of 64 MHz. The PWM4
module is to be used to generate an active-low latch signal (LDAC) for the digital-
to-analogue converter at a sampling rate of 32 kHz. Assuming that the LDAC
signal is to be low for 1 µs, explain and derive the CCS C compiler statements
required by the PWM4 module.

Figure: PWM4 block diagram





[4]

(d) The output of the PWM4 module is to be routed to one of the pins of the device
using the Peripheral Pin Select (PPS) capability. Using appropriate lines of code,
discuss the capabilities and limitations of the PPS function on a 18F27K40 device.


[3]

(e) The 12-bit digital-to-analogue converter is to be interfaced to a microcontroller
using a Serial Peripheral Interface (SPI). Describe the main features of an SPI
implementation used to realise the timing diagram shown in Figure 4.


[3]
Figure: Digital-to-analogue converter timing diagram

(f) Show the code fragment for a Timer 2 interrupt routine used to implement a direct
digital synthesiser outputting a 2 kHz sine wave at a sampling frequency of
32 kHz. Your solution should include the interrupt routine, associated commands
appearing in the main function and a detailed description of the look-up table (but
only calculate the first two entries). The gain bit, GA, should be cleared whilst the
shut-down bit, SHDN, should be set.



[3]


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