CS/ECE 4504: Computer Organization Page 1 of 5 Project Description and Guidelines 1 Introduction The purpose of this project is to familiarize students in CS/ECE 4504 to with architectural simulation, and reinforce concepts discussed in the class with hands-on implementation, debugging, and experimentation. The main idea is to hack an architecture simulator (called the “baseline simulator” below) to implement a new architecture or microarchitecture idea, and evaluate it on some meaningful workloads. Given the large variety of experiences on instruction set architecture, its simulator, and programming language, we decide to let you choose the baseline simulator by yourself. But please communicate with the instructor with your choice (required in the project proposal). Below are a couple of examples: • EduMIPS64, a Java based MIPS simulator • QtSpim, a C++ based MIPS simulator The project will be done individually. Each student shall tackle the following tasks: • Propose modifications with advanced pipelining and instruction level parallelism mechanisms to the baseline instruction set architecture simulator, • Implement these changes in the simulator, • Evaluate the effect of these changes on performance, and • Submit a final report to present the modifications and experimental results. 2 Timeline and Grading In total, the project is worth 30% of the final grade. 2.1 Grade Distribution The breakdown of total marks for the project, based on deliverable or milestone, is: (100% TOTAL) • 10% Project Proposal (March 10th) o A paragraph indicating the investigation to be conducted in the project. The proposed investigation may be taken from the list provided below, or may be suggested based on the interests of the students. The proposed investigation must be approved by the instructor, and the grade for the final report will be determined in part by the extent to which students achieve their stated goals. o To receive full credit, proposals must be received no later than 11:59 PM on the due date; proposals are to be submitted to Canvas. CS/ECE 4504: Computer Organization Page 2 of 5 • 20% Progress Report: (March 24th) o At the minimum, you should have the results on the baseline simulator. Specifically, you should have set up your baseline simulator, selected the appropriate benchmarks, and studied the performance of the baseline simulator with these benchmarks. o Please report the performance of the baseline simulator, in a table showing the performance for each benchmark program (similar to e.g., Figure 1.19 in the textbook). Please also use a couple of paragraphs, describing (a) any changes to the proposal; (b) the work done so far, (c) the work remaining, and (d) any problems that have been encountered. o The progress report is a natural time for students to raise any issues that may prevent them from completing the work they originally proposed. o To receive full credit, progress report must be received no later than 11:59 PM on the due date; progress reports are to be submitted on Canvas. • 30% Final Report (April 21st) o To receive full credit, Final Reports and source codes must be received no later than 11:59 PM on the due date; they should be uploaded to Canvas. o Each student should prepare a final report no longer than eight pages (US Letter, 1” margins, single column, 11 pt font, single spaced). The report should ▪ Describe the proposed modifications (e.g., improved branch prediction), ▪ Give the motivation behind the proposed modifications (e.g., to further reduce control hazards), ▪ Give an overview of the implementation (e.g., extending the Instruction object class), ▪ Detail the experimental setup used to evaluate the modifications (e.g., what benchmarks and why), ▪ Provide a table summarizing the performance of both the baseline simulator and the modification, ▪ Describe the results (e.g., if things sped up, and by how much), and ▪ Briefly discuss things that didn’t work as expected, and if possible, why. o As an example, the report might be organized with the following headings: ▪ 1. Introduction—briefly, what was done, why, and whether or not it was successful; ▪ 2. Approach—briefly, the modifications that were made to baseline simulator (e.g., EduMIPS64); ▪ 3. Implementation—how the architectural changes were translated into changes to the source code of the baseline simulator; ▪ 4. Experimental Setup—what are the benchmarks used to evaluate the architectural changes; how the architectural changes were evaluated; ▪ 5. Results—the results of the evaluation; and, ▪ 6. Post-mortem—what went well, what went wrong, and other final thoughts. • 40% Source code (April 21st) o To receive full credit, Final Reports and source codes must be received no CS/ECE 4504: Computer Organization Page 3 of 5 later than 11:59 PM on the due date; they should be uploaded to Canvas. o Submit one single zip file including softcopy of the entire program directory, including the baseline simulator (e.g., the original EduMIPS64 package), the benchmarks, and any modification you made. The source code should come with appropriate comments to help understand it. Additionally, your final directory should contain a README file that ▪ describes what the program does; ▪ explains how to run the program, including any required external software; ▪ describes any known bugs in the program. Your README should not describe the implementation of your program. Rather, it should serve as a user manual that allows anyone to use your program. 2.2 Grading Policies Unless you are given explicit permission from the course instructor, it is NOT acceptable to use code from other resources, such as the Internet. Using code from these other sources without prior approval from the course instructor will be considered a violation of Virginia Tech academic integrity. 3 Project Definition All projects must, at a minimum, (a) modify the baseline simulator with the selected pipelining and instruction level parallelism mechanisms; (b) evaluate the performance effect of the modification; (c) modifications may not break the architecture: programs must yield the same results before and after modification. To satisfy (b), you should develop or select your own set of benchmarks (examples are available), and provide justification for why the chosen mix of benchmarks is appropriate given the particular modification under test. The baseline simulator may be used to verify correct program behavior, therefore satisfying (c). Projects that fail to satisfy (a)-(c) above will be penalized substantially (maximum score will be 60% of the project). Suggested modifications are listed below, which uses EduMIPS64 as the baseline simulator. If you choose another baseline simulator, you may consider similar modifications as deemed appropriate. Beyond these examples, there are many possible modifications to pursue. Please feel free to propose your own (but you need the instructor’s explicit permission). CS/ECE 4504: Computer Organization Page 4 of 5 NOTE: You only need to choose and realize one of the following topics. 3.1 Pipeline Mechanics (1) By default, EduMIPS64 performs no forwarding. Explore the effect on performance of forwarding, by comparing performance of full forwarding with the default setting of no forwarding. (2) By default, EduMIPS64 allows registers to be read and written in the same cycle, and assumes the processor can read from instruction memory and data memory at the same time. Explore the effect of structural hazards: • by preventing simultaneous reading and writing of the register file, or • by using a single memory for instruction and data access. and compare it with the default. (3) EduMIPS64 does not support precise exceptions. Explore the effect they have on performance by requiring that floating point operations not overlap in execution. So by selecting this topic, you need to have 3 sets of comparison. 3.2 Branch Prediction By default, EduMIPS64 predicts that branches are not taken. Explore the effect on the performance of: • flushing the pipeline • predicting taken, or • dynamic prediction techniques, including o a 2-bit local predictor, o a (2, 2) correlating predictor, o a tournament predictor, and o a branch target buffer. 3.3 Dynamic Scheduling By default, EduMIPS64 does not perform dynamic scheduling. Explore the effect of Tomasulo’s algorithm on the performance as it enables out of order execution. To simplify the realization, you may assume the hardware resources are sufficient, e.g., with enough number of reservation station, load/store buffers, etc. NOTE: this is an advanced topic, as it may require to thoroughly modify the 5-stage pipeline, since MIPS 5 stage in-order pipeline can not issue/dispatch multiple instructions in the same cycle nor they can go out of order in the pipeline. 3.4 Other Topics Ambitious students might consider more ambitious projects. This is a decision on a CS/ECE 4504: Computer Organization Page 5 of 5 case-by-case basis, and please consult the instructor before making such a selection. NOTE: students’ grades will be determined in part by the extent to which they achieve their stated goals. • 4 Resources 4.1 Simulation Framework • The EduMIPS64 simulator and related resources can be found at https://www.edumips.org/, including the link to the source code of the simulator, its manual, etc. • The QtSpim simulator and related resources can be found at http://spimsimulator.sourceforge.net/. 4.2 Sample Benchmarks • In MIPS assembly language: ✓ EduMIPS64 Samples Pack, under Files->Projects->Samples-pack-0.1.tar.bz2, at https://canvas.vt.edu/files/17230703/download?download_frd=1 ✓ More EduMIPS64 Samples, under Files -> Projects -> Max_samples0.2.rar, https://canvas.vt.edu/files/17230705/download?download_frd=1 ✓ EduMIPS64 FP Samples, under Files -> Projects -> FPUMaxSamples.rar, https://canvas.vt.edu/files/17230704/download?download_frd=1 • In high-level programming language (so you will need to compile them first) ✓ SPEC benchmarks: not all are free for download, https://www.spec.org/benchmarks.html ✓ CortexSuite: Machine learning and vision benchmarks, http://cseweb.ucsd.edu/groups/bsg/ ✓ Polybench: Simple dense linear algebra codes, http://web.cse.ohio-state.edu/~pouchet.2/software/polybench/ 4.3 Other Links • Apache Ant (can be used to build EduMIPS64) • Qt Framework (the cross-platform UI framework required for QtSpim) • MIPS compilers and tool suites • Software tools for RISC-V
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