Dashboard / My courses / LE/EECS2021 A & B- Computer Organization (Fall 2020-2021) / Midterm / Midterm Morning (Sec. A)
Started on Wednesday, 21 October 2020, 1000 AM
State Finished
Completed on Wednesday, 21 October 2020, 1115 AM
Time taken 1 hour 14 mins
Marks 23.00/49.00
Grade 46.94 out of 100.00
Question 1
Correct
Mark 1.00 out of 1.00
What happens if the capacitive load is increased
a. The number of instructions in the ISA is decreased
b. The memory capacity in increased
c. The power consumption is increased

d. The width of the registers is decreased
e. The number of registers in increased
f. The number of registers in decreased
g. The number of instructions in the ISA is increased
h. The width of the registers is increased.
Your answer is correct.
The correct answer is:
The power consumption is increased

Question 2
Incorrect
Mark 0.00 out of 1.00
Question 3
Correct
Mark 1.00 out of 1.00
What happens to the number of Instructions in an ISA of a commercial computer (like Intel and AMD) from one generation to the next.
a. Always decreases to make the architecture more like a RISC

b. Always increases to accommodate more demanding applications
c. Sometimes it increases, sometimes it decreases
d. Always stays the same to guarantee backwards compatibility
Your answer is incorrect.
The correct answer is:
Always increases to accommodate more demanding applications
What instructions have different versions for signed and unsigned numbers
a. Load instructions (except ld), comparison instructions involving "less than" and "greater equal", shift right (but not left)
instructions and multiplication/division instructions (except mul)

b. All instructions have signed and unsigned versions
c. No instructions have signed and unsigned versions
d. All arithmetic instructions need to have signed and unsigned versions as well as comparison instructions involving "less than" and
"greater equal"
e. Only multiplication and division instructions have signed and unsigned versions
Your answer is correct.
The correct answer is:
Load instructions (except ld), comparison instructions involving "less than" and "greater equal", shift right (but not left) instructions and
multiplication/division instructions (except mul)

Question 4
Incorrect
Mark 0.00 out of 1.00
Question 5
Correct
Mark 1.00 out of 1.00
Who saves the saved registers
a. The called function before it starts execution
b. It is done automatically
c. The called function before it returns

d. The caller function before it returns
e. Any function before it modifies the register
f. The caller before calling a function
g. The caller function before it starts execution
Your answer is incorrect.
The correct answers are:
Any function before it modifies the register,
The called function before it starts execution,
The caller function before it starts execution
Who saves the temporary registers
a. The caller function saves them just before it calls another function

b.We do not save the temporary registers.
c. They are saved automatically
d. The caller saves them at the beginning of the execution
e. The called function saves them at the beginning of execution
Your answer is correct.
The correct answer is:
The caller function saves them just before it calls another function

Question 6
Correct
Mark 1.00 out of 1.00
Question 7
Incorrect
Mark 0.00 out of 1.00
What is the text segment
a. The part of the memory that contains the comments from the assembly code
b. The part of the memory where strings are stored
c. The part of the CPU that handles strings
d. The part of your assembly code that handles characters or strings
e. The part of the memory that contains instructions that are (or will be) executed

Your answer is correct.
The correct answer is:
The part of the memory that contains instructions that are (or will be) executed
You buy a new graphics card than can do things 20 times faster but the frame rate of your game only improves by a much smaller factor.
Who do you blame for this
a.Murphy's Law
b. Jude Law
c.Moore's Law

d. The manufacturer
e. Amdahl's Law
Your answer is incorrect.
The correct answer is:
Amdahl's Law

Question 8
Correct
Mark 1.00 out of 1.00
Question 9
Correct
Mark 1.00 out of 1.00
When loading the upper bits in a register with lui, sometimes we add 1 to the immediate. When and why do we do that?
a. Prevents underflow
b.Makes the program run faster
c. To counteract the effects of sign extension in the subsequent addi. 
d. To correct an old bug in the original RISC-V implementation
e. It is a leftover of the Intel x86 legacy
Your answer is correct.
The correct answer is:
To counteract the effects of sign extension in the subsequent addi.
Binary multiplication as we discussed in class involves
a. A series of comparisons and swaps
b. A series of additions and shifts

c. A series of memory references
d. A series of operations like AND, OR, NOT
Your answer is correct.
The correct answer is:
A series of additions and shifts

Question 10
Incorrect
Mark 0.00 out of 1.00
Question 11
Incorrect
Mark 0.00 out of 1.00
When a function has too many local variables and needs more registers than are available, what does it do?
a. Places some of the variables on the stack
b. Performs stack overflow
c. Uses PC-relative addressing

d. Treats a 64 bit register as two 32 bit registers
e. RISC-V cannot handle this
Your answer is incorrect.
The correct answer is:
Places some of the variables on the stack
Which reggisters can be treated as temporaries without need to save them on the stack
a. The temporaries, the stack pointer and the return address register
b. Only temporaries
c. The temporaries and unused argument registers
d. The temporaries and saved registers that we know are not used by the main program
e. The temporaries and x0

Your answer is incorrect.
The correct answer is:
The temporaries and unused argument registers

Question 12
Incorrect
Mark 0.00 out of 1.00
Question 13
Correct
Mark 1.00 out of 1.00
What synchronization mechanism for RISC-V did we discuss in class?
a. fence and fence.i
b. lock and unlock 
c. lr.d and sc.d
d. ecall
e. ebreak
Your answer is incorrect.
The correct answer is:
lr.d and sc.d
What is sign extension
a. The extra information carried by the label of an instruction
b. A mechanism to change a signed number to unsigned
c. A mechanism to change the sign of a number from positive to negative, or the other way around.
d. A mechanism to change an unsigned number to signed
e. A mechanism to preserve the sign (positive or negative) of a word, half word, etc, when copied in a 64 bit register

Your answer is correct.
The correct answer is:
A mechanism to preserve the sign (positive or negative) of a word, half word, etc, when copied in a 64 bit register

Question 14
Correct
Mark 1.00 out of 1.00
Question 15
Correct
Mark 1.00 out of 1.00
What instruction do we use to selectively set some bits of a register to zero
a. and 
b. xor
c. or
d. slli or srli
e. neg (a pseudoinstruction)
Your answer is correct.
The correct answer is:
and
What is the best way to take the complement of a register
a.We shift by 64
b.We subtract from zero and add one
c.We XOR with -1

d.We add one
e.We subtract one
f.We OR with zero
g.We add one and subtract from zero
h.We AND with 0
Your answer is correct.
The correct answer is:
We XOR with -1

Question 16
Correct
Mark 1.00 out of 1.00
Question 17
Incorrect
Mark 0.00 out of 1.00
What is the binary representation of -1 (minus one) inside a 64 bit RISC-V register
a. 000...001 (63 zeros)
b. Same as decimal: -1
c. Cannot have negative numbers on RISC-V
d. 1000,,,000 (63 zeros)
e. 1111....111 (64 ones in total)

Your answer is correct.
The correct answer is:
1111....111 (64 ones in total)
What RISC-V instructions involve two source registers
a. Immediate instructions

b.M, F and D instructions
c. Arithmetic instructions only
d. All instructions
e. Branch and arithmetic instructions
f. R, S and SB instructions only
Your answer is incorrect.
The correct answer is:
R, S and SB instructions only

Question 18
Incorrect
Mark 0.00 out of 1.00
Question 19
Correct
Mark 1.00 out of 1.00
Which instructions we used in the labs use the PC-relative mechnism
a. Branch, jump&link
b. Branch, jump&link, jump&link-register

c. ecall, ebreak
d. ld, sd, lw, sw, etc
e.multiplication and division instructions
Your answer is incorrect.
The correct answer is:
Branch, jump&link
How many bits is the opcode in RISC-V
a. 4
b. 1
c. 2
d. 5
e. 6
f. 7

g. 3
h. 8
Your answer is correct.
The correct answer is:
7

Question 20
Correct
Mark 1.00 out of 1.00
Question 21
Correct
Mark 1.00 out of 1.00
What kind of functions do not need to save the ra
a. Non-leaf functions that only have tail calls or tail recursion
b. Non-leaf functions
c. All functions need to save the ra
d. Leaf functions or non-leaf functions that only have tail calls or tail recursion

e. Leaf functions
Your answer is correct.
The correct answer is:
Leaf functions or non-leaf functions that only have tail calls or tail recursion
What is the effect of shifting three bits to the left
a. Add eight
b. Add three
c. Divide by eight
d.Multiply by eight

e. Divide by three
f.Multiply by three
Your answer is correct.
The correct answer is:
Multiply by eight

Question 22
Complete
Mark 7.00 out of 7.00
Translate the following procedure to RISC-V assembly
long long int myfun(long long int a, long long int b)
{
return fun(fun(a-b)-a+b);
}
Assume that function fun exists and accepts a single long long int argument and returns a long long int argument. Make use of the
tail call optimization if possible, and use the least number of stack operations (reading and writing to the stack). You do not need to
write comments or a main program. Submit a regular file called myfun.asm. You do not need to run it on the simulator.
myfun.asm
myfun:
addi sp, sp, -16 ;; save ra, s0
sd ra, 0(sp)
sd s0, 8(sp)

sub s0, a1, a0 ;; s0 = -a+b
sub a0, a0, a1 ;; a0 = a-b
jal ra, fun ;; fun(a-b)
add a0, a0, s0 ;; fun(a-b)-a+b
ld s0, 8(sp) ;; restore ra, s0
ld ra, 0(sp)
addi sp, sp, 16
jal x0, fun ;; tail call to fun

Comment:

Question 23
Not answered
Marked out of 3.00
Question 24
Complete
Mark 3.00 out of 3.00
An engineer working for a company is tasked to improve the performance of
an application. Upon examination the engineer realizes that a quarter of the
execution time is taken by the graphics of the application. A graphics
card would speed up these graphics by a factor of 5 and would not affect
the rest. If in the original
configuration the application took 40 seconds to execute, how long will it
take with the new graphics card.
Old execution time T = T + T = 40*0.25 + 4*0.75 = 10+30
New execution time T'
T' = T /5 + T = 10/5 +30 = 32
gr rest
gr rest
A processor runs at 3GHz, requires a voltage of 1.5V and consumes 30W of power. The next generation will run at 4GHz. What should
the voltage be in order to consume 22.5 W of power. Everything else stays the same.
22.5 / 30 = (CL * Voltage * Voltage * 4) / (CL * 1.5 * 1.5 * 3)
Voltage * Voltage = 1.265625
Voltage = 1.125V
P = 1/2 * C * V * f = 1/2 * C * 2.25 * 3*10 = C*3.375*10
So C = 8.89*10
P = 1/2 * C * V * f =1/2 * 8.89*10 *V *4*10 = V *17.78
V =  P / 17.78 = 1.27
V = 1.125
old old
2
old
9 9
-9
new new
2
new
-9
new
2 9
new
2
new
2
new
new
Comment:

Question 25
Not answered
Marked out of 3.00
Question 26
Not answered
Marked out of 5.00
A processor has a clock cycle duration of 0.5nsec. For a particular set of programs the branch instructions take 2 cycles, the load
instructions take 4 and all the rest take 1 cycle. If 10% of the instructions are branches and 20% are loads, how many instructions per
second does the processor execute?
CPI = CPI * 10% + CPI * 20% + CPI * 70% = 2*0.1 + 4*0.2 + 1*0.7 = 0.2 + 0.8 +0.7 = 1.7
Clock = 1/(0.5*10 ) = 2*10
IPS = Clock / CPI = 2*10 /1.7 = 1.18*10
effective br load rest
-9 9
effective
9 9
Write a very short main program in RISC-V that calls a function FUN with two 64-bit integer arguments that returns a 64-bit integer. The
program then prints the result. Your main program invokes it with 3 and 5 as arguments. Submit a file named FUN.asm, You do not need
to write the function FUN
The minimum is this:
addi a0, x0, 3
addi a1, x0, 5
jal ra, FUN
ecall x0, a0, 0

Question 27
Not answered
Marked out of 7.00
Translate the following procedure to RISC-V assembly
long long int recfun(long long int a, long long int b)
{
if (a==0) return b;
return fun(recfun(a-1, b+1))
}
Assume that function fun exists and accepts a single long long int argument and returns a long long int argument. Make use of the
tail call optimization if possible, and use the least number of stack operations (reading and writing to the stack). You do not need to
write comments or a main program. Submit a regular file called recfun.asm. You do not need to run it on the simulator.
The solution is:
recfun:
addi sp, sp, -8
sd ra, 0(sp)
beq a0, x0, ENDrecfun
addi a0, a0, -1
addi a1, a1, 1
jal ra, recfun
jal ra, fun
ld ra, 0(sp)
addi sp, sp, 8
jalr x0, 0(ra)
ENDrecfun:
addi sp, sp, 8
addi a0, a1, 0
jalr x0, 0(ra)
◀ Echo360 Lecture Capture Videos
Jump to...
Sample Midterm ▶







欢迎咨询51作业君