ELEN30011 Electrical Device Modelling
Workshop 6 - Voltage Regulator
An application of bipolar junction transistors
Voltage regulation is a critical functional requirement in most electronic engineering designs.
For example, in digital systems, the availability of tightly regulated DC voltage supply rails is
crucial to the implementation of quantized logic levels, noise margins, and fan-out considerations
that are vital for the realization of logic systems via analog electronic devices. Indeed, in the
absence of such regulation, compatibility between logic gates and systems cannot be guaranteed.
This is particularly evident in those situations where the unregulated supply voltage is subject to
noise or is otherwise time-varying. A typical example of this is any battery operated device (e.g.
a mobile phone), where the battery voltage varies naturally as a function of the battery charge.
(Another example is any rectifier based supply. There, the DC voltage generated is subject
to switching noise, with the amplitude depending on the AC supply voltage.) Consequently,
the presence of DC voltage regulators (e.g. the 7805, see Figure 1) is commonplace in digital
circuits and systems.
Figure 1: A 7805 5 V D.C. regulator in a TO-220 package.
The main conceptual issue concerning DC voltage regulation concerns the problem of how to
generate a constant voltage from a varying one. For example, doubling the unregulated input
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voltage to a voltage regulator should have no effect on the regulated output voltage. Conse-
quently, superposition cannot (and should not) apply to a voltage regulator circuit. By defini-
tion, this means that voltage regulator implementations must be nonlinear. This nonlinearity
is typically implemented by a specific semiconductor device that is used to generate a constant
DC voltage reference that is independent of the unregulated supply. This voltage reference is
then buffered to provide appropriate current gain in generating the regulated output voltage.
Other features typically implemented in voltage regulators include current limiting (a fail-safe
for output short circuit protection), and temperature compensation (to provide a stable output
voltage across a range of operating environments). The topology of a basic voltage regulator
that implements current limiting (but not temperature compensation) is shown in Figure 2.
Voltage REGULATION ERROR
REGULATED
OUTPUT
+
−
VO
FEEDBACK
AMPLIFIED OUTPUT
OUTPUT
REFERENCE
VI UNREGULATED INPUT
amplifier
Difference
limit
Noise
filter
Current
Current
gain
reference
Figure 2: Topology of a basic regulator.
DC voltage regulators are fundamentally different to DC-to-DC converters in their operation,
as illustrated in Figure 3. In a DC-to-DC converter, power delivered to the input side in the
form of a DC voltage and current is first converted to a primary AC voltage and current. This
primary AC voltage is then traded-off against the primary AC current via a transformer or
charge-pump circuit, yielding a secondary AC voltage and current. The key point is that this
secondary voltage may be either higher or lower than the primary voltage, provided that energy
is conserved. In a boost converter, the secondary voltage exceeds the primary voltage, with a
corresponding reduction in current. A buck converter implements the other option, where the
secondary voltage is less than the primary, with a corresponding increase in current. The DC
output from a DC-to-DC converter is obtained directly from the secondary AC voltage by way
of rectification.
In a voltage regulator, no such trade-off between voltage and current is possible, simply because
there is no AC to AC conversion stage. (Indeed, DC voltage regulators are exclusively DC
devices.) Instead, voltage regulators work by simply dropping the unregulated component of
the input voltage across an internal load (modelled by resistor R in Figure 3), leaving the
regulated component of the voltage at the output. As this voltage drop must be positive, the
DC output voltage obtained from a DC voltage regulator for a given DC input voltage must
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be less than that DC input voltage. Furthermore, as this voltage drop is experienced by the
current flowing from the input to the output, the unregulated component of the input power is
essentially dissipated as heat by the aforementioned internal load. This means that DC voltage
regulators are necessarily energy inefficient, with this inefficiency being more apparent when
the regulated output voltage is significantly less than the unregulated input voltage. DC-to-
DC converters on the other hand can be designed to be very energy efficient. (By this same
argument, note that a DC voltage regulator analogue of a boost converter is not possible.)
+
−
VO
R
Vref
DC VOLTAGE REGULATOR
AC VOLTAGE
GENERATOR
+
−
VI RECTIFIER
+
−
VO
DC-TO-DC CONVERTER
PRIMARY SECONDARY
+
VI
−
Figure 3: DC voltage regulator and DC-to-DC converter.
The aim of this workshop is to investigate the implementation and operation of a DC voltage
regulator circuit implemented using standard components. An incomplete component list is
provided below.
• 2 × NPN BJTs (1 × 2N3055 power transistor + 1 × 2N2222 signal transistor).
• 1 × Zener diode (1N750)
• 1 × op-amp (LT1006)
• Various resistors and capacitors.
1 Safety warning
The voltage regulator considered in this workshop is intended to operate at low voltages and
low currents. However, incorrect wiring can lead to destructive and hazardous device failure
if incorrect components are used, if device polarity is not correctly adhered to, or if device
operating limits are exceeded. Such failures can be explosive, generating projectiles that pose
a serious hazard to unprotected eyes.
This voltage regulator circuit should not be constructed
or operated outside of the laboratory.
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2 Voltage reference
A circuit for implementing an unbuffered voltage reference is shown in Figure 4.
+
Voltage
reference
VI
Rref
CrefDref
REFERENCE
UNREGULATED INPUT
−
VOLTAGE
UNBUFFERED
Vref
Iref
IZ
Figure 4: Unbuffered voltage reference.
Tasks
2.1. Sketch a general voltage-current transfer characteristic IZ−Vref for the reverse biased Zener
diode shown. Include in your plot the breakdown voltage Vbr for the diode. Is a Zener
diode a linear circuit element?
2.2. Show that under D.C. operating conditions,
IZ =
(
VI
Rref
− Iref
)
−
(
1
Rref
)
Vref . (1)
Explain your working.
2.3. Superimpose the transfer characteristic defined by (1) on your plot of 2.1. Based on the
resulting sketch, label the point that defines the D.C. operating current and voltage for
the Zener diode.
2.4. With Rref and Iref very small, what can you say about the reference voltage Vref obtained
from this circuit? With the aid of appropriate additional sketches and discussion, explain
what happens to the reference voltage Vref as Rref is increased. Repeat for the case where
Iref is increased.
2.5. Using your answers above, what can you conclude about the operation of the circuit of
Figure 4 as a voltage reference. What is required for Vref to be approximately constant
and independent of the unregulated input voltage VI?
2.6. Explain why the voltage reference of Figure 4 is referred to as “unbuffered.” What are the
limitations in the load that may be connected to the output Vref of this circuit? What is
the role of capacitor Cref?
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3 Difference amplifier
An op-amp may be used to implement the difference amplifier shown in Figure 2, as per Figure
5 below. An ideal op-amp has the property that the difference vd between + and − input
voltages is zero, rendering the output voltage VO of the voltage regulator equal to the reference.
In real op-amps, this property is approximated by way of a high gain from vd to the op-amp
output working in concert with negative feedback from the op-amp output back to vd. Referring
to Figure 2, this means that a reduction in the voltage regulator output voltage VO translates
to an increase in vd, which gives rise to a higher op-amp output voltage, which in turns pulls
VO up. Thus, the difference amplifier is critical to the correct operation of the voltage regulator
in the presence of different loads.
−
+
REGULATION ERROR
AMPLIFIED OUTPUT
FEEDBACK
REFERENCE
Difference
amplifier
VI UNREGULATED INPUT
+
−
+
−
+
−
Iref
Vref
+
−
OP-AMPvd
Figure 5: Difference amplifier.
Tasks
3.1. A simplified model for the difference amplifier connected in feedback with the current gain
and current limit is shown in Figure 6. By analysing this model, show that the transfer
function from the voltage reference Vref to the output VO may be approximated in the
frequency domain by
VO(s)
Vref(s)
=
1(
1 + 1
A
)
+ s
(
RC
A
) . (2)
By examining (2), explain the effect of increasing the op-amp gain A on the (i) the steady
state regulated output voltage, and (ii) the speed with which the regulated output voltage
can respond to load changes. Summarize why it is useful to implement the voltage regulator
using an op-amp that has a high gain.
3.2. Op-amps are designed to have high input impedance and low output impedance. With
the + input of the op-amp acting as a load for the voltage reference Vref, and the op-amp
output required to drive the current gain module of Figure 2, discuss why these op-amp
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properties are useful in the implementation of a voltage regulator. Pay particular attention
to your answer to 2.6 above.
3.3. What limitations (if any) are there on the selection of the op-amp of Figure 5? (You may
need to do some reading on different types of op-amps here.) How does the choice of
op-amp affect the range of unregulated input voltages that may be applied? Explain your
answer.
+
−
Avd
VIUNREGULATED INPUT
UNBUFFERED
VOLTAGE
REFERENCE
vd
+
−
+
− −
+
VO
C
R
Vref
FEEDBACK OUTPUT
Figure 6: Simplified model.
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4 Current gain
An NPN bipolar junction transistor (BJT) may be used to implement the current gain module
of Figure 2, as shown in Figure 7. For the purpose of the tasks of this section, the current limit
may be ignored. That is, assume IL = 0.
−
REGULATION ERROR
Current
gain
AMPLIFIED OUTPUT
R1
Q1
UNREGULATED INPUTVI
IE
IL
IB
+
VE
Figure 7: Current gain.
Tasks
4.1. Reproduce the circuit diagram of Figure 7 and include labels for the base B, collector
C, and emitter E for the transistor Q1. Also include labels for the base-emitter junction
voltage VBE and the base-collector junction voltage VBC, and their respective polarities.
4.2. The amplified output regulation error voltage supplied to the circuit of Figure 7 is itself the
output of an op-amp with supply rails 0 and VI. What is the maximum that this voltage
can be? In view of your answer, can the base-collector junction of Q1 ever be forward
biased? Explain.
4.3. Using the same reasoning as above, and by inspection of Figure 2, can the base-emitter
junction of Q1 ever be reverse biased? Explain.
4.4. If the base-emitter junction of Q1 is forward biased and the base-collector junction is
reverse biased, the transistor operates in forward active mode. What is the relationship
between the emitter and base currents IE and IB when Q1 operates in this mode?
4.5. Look up and write down the current gain IE/IB for the two transistors available for this
workshop. In view of your answers above, discuss whether the circuit of Figure 7 will be
suitable for the current gain module of Figure 2, given that the maximum output current
for the voltage regulator is to be less than 100 mA. (Selecting a value for R1 in the range
of 10 Ω to 100 Ω may help here, as may knowing the maximum output current that can be
sourced from the available op-amp.)
4.6. What do you think happens to IE if VE gets too big? Explain.
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5 Current gain with current limit
A current limit can be imposed on the current gain circuit of Figure 7 by the introduction of
a current sense resistor R2 and a current bypass transistor Q2, as shown in Figure 8.
IL
REGULATION ERROR
limit
Current
Current
gain
AMPLIFIED OUTPUT
UNREGULATED INPUT
R1
R2
Q1
Q2
VI
−
VO
+
IE
Figure 8: Current gain with current limit.
Tasks
5.1. The base-emitter junction of transistor Q2 is limited by its contact potential, denoted here
by V◦. Resistor R2 is often referred to as a current sense resistor. On that basis, estimate
the maximum current that can flow through the resistor R2. Explain your answer.
5.2. Given that the collector of transistor Q2 is connected to the base of Q1, explain what
happens to the base current for Q1 as its emitter current approaches the limit found in
5.1. Is this consistent with the notion that Q2 implements a current bypass?
5.3. In view of your answers above, explain how the current limit and current gain interact if
the output VO is short-circuited.
5.4. Based on 5.1 above, select a value for the current sense resistor R2 that implements a limit
of 70 mA. (Assume that V◦ ≈ 0.7 V.)
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6 Regulator simulation model construction and testing
An incomplete circuit diagram showing the integrated module implementations for the voltage
regulator of Figure 2 is shown in Figure 9.
Tasks
6.1. Create a new LTspice schematic. Configure a 15 V D.C. voltage source to simulate an
unregulated supply voltage VI for the voltage regulator. Using suitable selections for Rref,
Cref, and Dref, construct a simulation model for the voltage reference module of Figure 4.
6.2. Run your simulation model of 6.1. Plot the unbuffered voltage reference Vref produced by
this module, and determine its nominal value (units V). Verify that this nominal value is
consistent with the analysis of Section 2.
6.3. Select a suitable µF range value for the capacitor C in the noise filter of Figures 2 and 9.
Add the noise filter and the difference amplifier modules of Figure 5 to your simulation
model, and connect as per Figures 2 and 9. Include the negative feedback connection as
per Figure 6, without the current gain and current limit modules. (Pick R = 10 kΩ, and
use it to connect the output of the difference amplifier to the noise filter and feedback.)
6.4. Run your simulation model of 6.3. Plot the output voltage VO across the capacitor C in
the noise filter, and determine its nominal value (units V). Verify that this nominal value
is consistent with the unbuffered voltage reference of 6.2 above.
6.5. Replace the resistance R of 6.3 above with the current gain and current limit modules of
Figures 7 and 8, connected as per Figures 2 and 9. Repeat 6.4 above.
6.6. By varying the unregulated supply voltage VI (configured in 6.1 to be 15 V D.C.) and
running repeated simulations using your enlarged model of 6.5, construct a plot of the
output voltage VO versus VI for the voltage regulator.
6.7. By examination of your plot in 6.6, determine the value of VI at which voltage regulation
fails. By computing the corresponding current, determine whether this failure is due to
action of the current limit of Figure 8, or some other phenomenon. Discuss your answer.
6.8. Restore the unregulated supply voltage to VI = 15 V. Attach a load resistor to the voltage
regulator output (i.e. across VO in Figure 9). By varying the value of this resistance and
running repeated simulations, construct a plot of output voltage VO versus load resistance
(units kΩ) for the voltage regulator.
6.9. By examination of the plot constructed in 6.8, determine the load resistance at which
voltage regulation fails. By computing the corresponding current, determine whether this
failure is due to action of the current limit of Figure 8, or some other phenomenon. Discuss
your answer.
6.10. Based on all of your investigations in this workshop, summarize the principles of operation
(and limitations) of the circuit of Figures 2 and 9 that ensure that the output voltage VO
is regulated in the presence of varying load resistances and unregulated supply voltages.
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