XX01/159.233 CP
ALB
Internal
MASSEY UNIVERSITY
ALBANY CAMPUS
EXAMPLE EXAMINATION FOR
159.236 EMBEDDED PROGRAMMING
Semester Two - October 20XX

Time allowed: THREE (3) hours
Attempt ALL FIVE (5) questions.
This examination contributes 60% to the final assessment.
Questions are of equal value
Calculators are permitted - no restrictions
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XX01/159.233 CP
ALB
Internal
1.
(a) Give the truth table and draw the logic symbol for a three input NAND gate.
[2 marks]
(b) Given the following truth table with three inputs (A,B,C) and one output (D):
A B C D
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 0

(i) Give a boolean expression for D in terms of A,B and C.
[2 marks]
(ii) Draw a logic diagram for an implementation of this table; use only OR, AND
and NOT gates.
[2 marks]
(iii) Redraw your diagram from part (ii) using only NOR and NOT gates.
[2 marks]
(c) Draw the truth table for a 2 to 4 decoder with output enable.
[2 marks]
(d) Use a truth table to prove the following:
X.Y+X.Z=X.(Y+Z)
[2 marks]
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XX01/159.233 CP
ALB
Internal
2.
(a) Briefly describe the difference between a level triggered flip flop and an edge
triggered flip flop.
[2 marks]
(b) Show how JK flip flops may be used to build a four-bit asynchronous
up counter.
[2 marks]
(c) Modify your design from part b) so that it is now a loadable counter.
[3 marks]
(d)
Given the circuit shown above, if the initial values of S0, S1, S2 and S3 are 1,1,1 and 0
respectively, what are the values of S0, S1, S2 and S3 after 4 clock pulses?
[2 marks]
(e) How many flip-flops are necessary to build a static memory with a 10 bit address bus
and an 8 bit data bus?
[2 marks]
(f) If the output of a level triggered D-Type flip flop is low, the clock is low and the D
input becomes high, what happens to the output?
[1 mark]
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D Q D Q D Q D Q
clock
S
0
S
2
S
3
S
1
XX01/159.233 CP
ALB
Internal
3.
An automatic tornado warning system has the following inputs and one output:
Inputs:
D1,D0 - Wind direction,
00 = North
01 = East
10 = South
11 = West
H - High wind detected for at least 2 clock periods.
Output:
A - Trigger tornado alarm (alarm stays on)
The alarm should be triggered if the wind changes by 180 degrees, i.e. (N→S,
S→N,E→W or W→E) and high wind is detected.
(a) Draw a state diagram for the warning system, use 4 states for the 4 directions and
conditional outputs to trigger the alarm when one of the dangerous direction changes
happens and a high wind condition exists.
[3 marks]
(b) Draw a truth table for the state transitions.
[3 marks]
(c) Write a C program for an ESP32 based embedded system to implement this
controller using only reads and writes to device registers.
Assume the inputs and output are mapped to the following GPIOs.
Inputs
D0 GPIO12
D1 GPIO13
H GPIO15
Output
A GPIO2
The input data register for gpios 0-31 is GPIO_IN_REG and the output register is
GPIO_OUT_REG. These are delared as: volatile unsigned *
Assume the GPIOs are already initialised correctly as inputs or outputs.
Poll the inputs every second and use the ets_delay_us() function for timing.
[6 marks]
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XX01/159.233 CP
ALB
Internal
4.
Pico-computer architecture
Sections a,b and c of this question refer to the pico-computer:
(a) Draw an ASM diagram to illustrate the sequence of operations in this datapath
that are necessary to execute an STA instruction, assume the opcode has been read
and the PC incremented.
[2 marks]
(b) What is the purpose of the Program Counter?
[2 marks]
(c) Describe how you would implement the following new pico-computer instruction:
LDA [A+offset] - Load A with the value stored in memory at the address stored in A
plus an offset (displacement addressing)
[4 marks]
(d) What is register indirect addressing and when is it used?
[2 marks]

(e) Give a sequence of pico-computer instructions that can be used to multiply the value
stored in Acc by 3 (assume you can use memory location 100 for temporary values).
[2 marks]
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Program
counter Accumulator
Arithmetic
Logic Unit
A Buffer
Register
Input Port
const
mux
Memory
Memory
Address
Register
EQZ
1 0
Bus
Tristate
buffer
Tristate
buffer
Tristate
buffer
Tristate
buffer
OEPC
INCPC
LDPC
OECONST
CO/C1
OEACC
LDACC
OEPORT
sub
OEMEM
WEMEM
LDMARLDABR
xor
invertor
zero
detect
XX01/159.233 CP
ALB
Internal
5.
(a) Briefly describe how the two buttons on the TTGO T-Display board can be used by a
C program for input.
[2 marks]
(b) Give a sequence of 3 RISC machine instructions that contains two RAW data hazards.
Show where the hazards occur.
[2 marks]
(c) What happens during the “Memory” stage of a classic 5 stage RISC pipeline. Which
instructions use this stage?
[3 marks]
(d) What is an instruction stall?
[1 mark]
(e) What is an interrupt handler?
[2 marks]
(f) What is register renaming used for?
[2 marks]
+ + + + + + + +
Page 6 of 6

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